Translation of "Programmable counter" in German

The appropriate period is created by the programmable 12-bit counter 35.

This may consist of a programmable counter 26 (FIG.

According to an embodiment of the invention, a programmable double stage counter is used.

Timing unit 165 may be set up as a programmable counter or timer, for instance.

The output connection can be controlled by a programmable timer or counter which is provided within the control device 130 .

At the outputs Q1 to QM of this address counter a new selectable circuit address is provided in this manner, which is passed through the line 116 to a programmable down counter 117 and which ensures that via the lead 16, in a period determined by the operation control 110, a series of pulses are emitted as selectable circuit clock pulses, the number of which corresponds to the number predetermined by the address counter 115.

Furthermore, the reset pulse emitted by the OR gate 129 goes to the the PE input of a programmable countdown counter 130 which serves to count the operation clock pulses transmitted to the operation control 110 and to block the operation control 110 through its clock enable input by means of a signal appearing at its overflow output "0", if six clock pulses have been transmitted to the latter.

The input magnitude of the relevant adjusting member thus determined at any time is now transferred in a writing operation into the programmable multiple counter 28.

If the two are identical, that is to say if the delay time TV has elapsed, the output of the time comparator 21 jumps from a logical "0" to a logical "1" so that a subsequent AND gate 22 can freely pass the counting pulses appearing at the third output of the second comparator 18 to a counting input (clock input) of the programmable counter 17.

The loop formed from the comparators 16 and 18 and the programmable counter 17 as temporary memory provides a memory content Z4 in such a manner that, if the carrier-characteristic values Z3 fall, that is to say if the digital amplitude values A rise, Z4, delayed by one clock interval, also falls but that, if the carrier-characteristic values Z3 rise, that is to say if the digital amplitude values A drop, Z4 is initially held constant at a low level via the delay time TV and is incremented step by step only after TV has elapsed.

Before the device is set into operation, the desired frequency is input as a digital value FW at the input 4 of the programmable countdown counter 1.

The timer module includes a universally programmable counter whose clock input is connected to the system clock of the personal computer via the divider module of the interface module.

The timing unit includes a universally programmable counter whose clock input is connected to the system clock of the personal computer via the divider unit of the interface module.

As programmable counter 17 and time counter 19, SN 54193 or SN 54163-type synchronous 4-bit counters are preferably used and employed either singly or in cascase depending on the bit number of a digital value.

In a preferred embodiment, the counter 14 is a programmable counter, whose value p can be regulated at a control desk.

The memory sequence control 40 contains a programmable counter which supplies the addresses for the memory 33 during the comparison operation and is constructed analogously to the address counter 29.

Now in order to implement these and still further objects of the invention which will become more readily apparent as the description proceeds, the new and improved data input and output device according to the present invention is characterized in that the magnitude of adjustment is transferred into a programmable multiple counter, the counters of which associated with each individual phase of the three-phase power supply are controllable by means of a synchronizing or synchronization device in such a way that the thyristors are ignited or fired at any one time at the same phase angle corresponding to the magnitude of adjustment.

The addressing occurs by means of the programmable counter 29 and by way of the adder 32, whereby the outputs from the memory 32 have a constant, specific value.

Numeral 50 designates a programmable time-counter which causes a delay of the output signal indicating the exceeding of a limit value.

These address signals are now not delivered in the form of pulse packets, the pulse number of which each time corresponds to the initial count value n of the programmable backward counter 35 of a quite certain measuring unit 5.

Such a circuit arrangement can for example be a second programmable backward counter, the setting and clock inputs of which are connected parallelly to the backward counter 35' to the outputs of the AND-gates 40' or 41' and the "0" output of which is connected with the A2 output of the control circuit 14'.

The sampling frequency of the sampling controller, and hence the speed of control, can be determined by means of a programmable counter which is included in the microprocessor system and which receives a value which corresponds to the sampling interval. The same holds good tube current and voltage.

Since the address, which is emitted in the form of coded electrical rectangular pulses from the central unit for the selection of a circuit arrangement, goes in common to a plurality of addressable circuit arrangements 1, each circuit arrangement 1 possesses an address recognition circuit 3, which in the present case is formed by a programmable reverse counter, the programming inputs P1, P2, . . ., Pm can be applied with the aid of wire bridges 4 to a positive voltage or be left free.

The logic "1", which appears as control signal at the "0" output of the programmable reverse counter 3 of a selected circuit arrangement 1, serves for example to close a switch 5, whereby a measuring sensor 6, which in the example of embodiment shown in FIG. 1 is formed by a temperature-sensitive current source 6, is applied to a positive supply voltage.

From this description of the basic functions of the selectable circuit arrangement 1 within a system comprising a plurality of such circuit arrangements, it is evident that at least three different kinds of electrical rectangular pulses must be fed from the central unit to each of these circuit arrangements 1, namely address signal pulses or counting pulses for the programmable reverse counter 3, switching command signal pulses for the switching on or off of the unit 7 and setting signal pulses, which serve at the beginning of each selection cycle to write the address contained in the address memory 2 anew into the reverse counter forming the address recognition circuit 3.

If one chooses the repetition frequency of the counting pulses to be processed by the programmable backward counter 35 or 35' to be shorter than t4, then the reverse counter 35 or 35' can by these pulses count away beyond its "0" count value without a drive signal for the downstream switches appearing at the output of the OR-gate 132.