Übersetzung für "Write bus" in Deutsch

The outputs are connected to the memory array write address bus MAADWR.

The second inputs of the AND gates AND of both demultiplexers DMUXWR are connected to the memory array write address bus MAADWR.

In this minimum configuration, connecting elements 10 and 11 for the transmission of data signals D0 . . . D7, connecting elements 12 and 13 for the transmission of control signals RD (READ), WR (WRITE) and BL (BUS LOCK) as well as connecting elements 14 and 15 for the transmission of a control signal R8 (READY 8 BIT) as an acknowledgement signal for 8-bit data transmission are present.

For controlling the summation or superpositioning process, a write/read/address control device 32 is provided which, on the output side is connected via a bus 33 to line memory 24 and, on the input side is connected via a write/read bus 34 to central control unit 12.

Interface 3 is also assigned to the address register of the release impulse ALE (ALE-STROBE), the read-input impulse (Read Strobe) for bus read, and the write input impulse WR (Write Strobe) for bus write.

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Upon occurrence of an error, the latter can modify rotation speed target value n_s (“SET n_s”) via a connection 162 that leads to drive function “AF” 150; write into nonvolatile memory 74, via a connection 166, data concerning the error and instantaneous operating data that are obtainable via a connection 164 from operating data function “BDF” 89 (“SAVE DATA”); output data concerning the error and instantaneous operating data via bus 82 (“WRITE BUS”); or, via a connection 168, trigger an alarm in alarm function 86 (“ALARM”).

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The M-Bus Gateway Pack provides an interface between UnitronUC32 BEMS networks and M-Bus meters, allowing Unitron to read and write M-Bus data.

An internal control telegram contains a start identifier field into which the bus coupler is able to write an identifier which identifies the internal control telegram, and contains at least one state information field for writing and reading bus coupler-related and/or bus user-related control information which is used in particular for decentralized monitoring and diagnosis of the communication between two respective bus users.

In the case of writing to the bus, the outputs are compared in the compare unit, and, given equality, this data is written to the bus via the one available access.

Preferably the bus controller is namely adapted for writing bus messages of other subscribers to the message memory, which by other bus subscribers are sequence-transmitted after or between bus messages to be transmitted by the bus controller in or outside the bus messages.

In the case of writing to the bus, the outputs are compared in the comparison unit, and, given equality, this data is written via the one available access to the bus.

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A bus control unit BS is also present, which on the interface subassembly SB is connected directly to the central computer ZR and which also accesses the bus system B on the side of the computer R. Besides the usual bus functions, such as arbitration and controlling reading and writing cycles, the bus control unit BS also enables specialized initialization control, by means of which the interface subassembly SB can be initialized.