Übersetzung für "Multiplex line" in Deutsch

The respective signal transmission direction of each of these two time-division multiplex line is indicated by way of corresponding arrows.

Via such a multiplex line, different control units may be interconnected in a simple and effective manner.

The logic control circuit 103 in turn is controlled by the time slot sequence clock pulses RCL and TCL and by the related time slot synchronizing signals RSY and TSY and periodically, at a set receiving time slot RTS for its duration, it gives an opening pulse to an expander 104 or 105, to which the eight-digit PCM signals receiving from a multiplex line with a receiver 106 are fed.

The compressor 116 converts the 12-digit linear words fed to it into nonlinear eight-digit signal words which are synchronized with the transmitting time slot. Sequence clock pulse TCL in the transmitting synchronizing storage register 117, and, in connection with the time slot assigned and set for the respective relative address, is read out by way of an OR element 118 and transmitted by way of the multiplex line 107 to the conference-related stations; i.e., the stations actually involved in a given conference.

PCM words occurring on the time-division multiplex line which belong to normal dual connections are switched via a time switching stage (not illustrated here) of the switching locations.

During a pulse frame in which, for example, the conference memory half RAM1 serves for information acceptance, the incoming PCM words on the time-division multiplex line Muxa which represent the parts of the individual conference participants arrive into the assigned memory locations of the memory areas of the memory half RAM1.

Moreover, PCM words which have been generated at a central location by a call progress tone generator and which are incoming on the time-division multiplex line Muxa and serve for the representation of the call progress tones are inscribed in the memory locations of the conference memory half RAM1 provided for this purpose.

During the time slots assigned to the individual conference participants, there now occurs from there an output from the conference memory part or, respectively, an insertion onto the outgoing part Muxg of the time-division multiplex line.

The mentioned offset and the delay proceed from the conditions in the time-division multiplex line (incoming or, respectively, outgoing).

As has already been explained, the inscription of the partial information arriving by way of the time-division multiplex line K per time channel occurs cyclically.

The partial information stored at that location can now be read and transmitted onto the outgoing time-division multiplex line L and in that time slot which is chronologically allocated to the previously-selected holding memory location.

In a manner similar to linkage switch device M for multi-channel connections, a further linkage switch device (not illustrated in detail) is provided with whose assistance it can be derived for each of the time channels of the outgoing time-division multiplex line concerning in which of the two complete memories (U or V) the partial information is stored under the respective complete memory location address is to be read, being derived from the holding memory location address respectively assigned to the appertaining time channel and from the complete memory location address to be stored or stored at the appertaining memory location in the holding memory.

As further proceeds from the drawing, the memory location addresses of the complete memories and the time slots of the time channels of the outgoing time-division multiplex line contain continuous numerical values in accordance with; the successively succeeding write operation and read operations within each of the write cycles and each of the outgoing pulse frames.