Translation of "Programmierbaren festwertspeicher" in English

The expense of the programmable read-only memory is very high.

The output signals of the conductor bundle 22 are moreover supplied to a programmable set-value store 27 (PROM).

The RAM 28 and a PROM 30 makes the microprocessor 26 a microcomputer.

For the achievement of this object, provision is made, in accordance with the invention, for the values determined by the weight-measuring device to be supplied in digital form to a programmable set-value store and for the codifier and the set-value store to be connected with the display device through a multiplexer which alternatively transmits the output signal of the codifier or that of the set-value store to the display device.

Position display instrument as set forth in claim 1, in which the memory is an interchangeable, programmable read only memory (PROM).

It is also possible to store the map data of a certain "atlas" of map sheets in an interchangeable, programmable read-only memory (PROM), which then represents the memory for storing the map data and, when another "atlas" is used, can be replaced by another read-only memory.

The correction stage 52 essentially consists of four controllable gates 54 through 57 and of a programmable read-only memory 58 (PROM).

This random number V is first transferred from the programmable read-only memory EEPROM into a working memory RAM (block 10 in the Figure) that is also integrated in the processor chip and that, for example, is 128 bytes in size and divided into a total of sixteen blocks each having a size of eight bytes.

Furthermore, the compensation circuit includes a downstream analog/digital converter 21, a programmable fixed value memory 23 and two other downstream digital/analog converters 25 and 27, ahead of which are connected two registers 29 and 31.

According to a specific development of the invention, it is provided that the electronic control comprises as calculating unit a microprocessor and a programmable read-only memory.

A prerequisite for the method of the present invention is a processor chip having an integrated random number generator whose most recently generated random number V is intermediately stored in a memory, for example, in a programmable read-only memory EEPROM.

The output b consists of six data lines and of one signalling line in communication with the input 33 which informs the buffer memory 10 whether the code word present on the data lines was converted in the programmable read-only memory 28 or in the programmable read-only memory 29.

In mail-weighing machines the values determined by a weight measuring device (20) are supplied in digital form to a programmable set-value store (27).

However, if the electronic advancement of the sound field is implemented by the half-cycle method or the modified half-cycle method, the transmitting system 30 is expanded by one channel, i.e., by one PROM 33, one digitally programmable delay line 34, and by one transmitting amplifier 35.

U.S. Pat. No. 5,259,063 discloses a self-programming circuit in which a processing unit with an electrically erasable and electrically programmable read-only memory (EEPROM), a classification unit in the form of a central processor and an interface unit are provided, the processing unit reading out processing information from the read-only memory, in which circuit input values and/or internal values are processed in the classification unit to give classification results, the input values of the circuit also representing input values of the self-programming processing unit, and in which circuit an interface unit is provided in such a way that from one of the classification results there is generated at least one EEPROM address and at least one EEPROM datum (ED) and the read-only memory (EEPROM) is programmed therewith.

The signal processor 11 is connected to a working memory and a programmable ROM 14 via a bus line 12 for this purpose.

Scanning device 10 may be implemented with a software function stored in a programmable read only memory, e.g., an EPROM, and allocation storage memory 11 may be implemented with any conventional memory device including, e.g., a random access memory (RAM).

For this purpose, the remote station is provided with a programmable read-only memory which generates a predetermined signal sequence (message). The central computer compares the coded signal sequence with the one stored in its memory.

A vertical signal of particularly high accuracy in relation to the number of lines is provided by the circuit for producing a vertical signal if said circuit is provided with a third counter, which counts the pulses of the horizontal synchronization signal and which is reset by the vertical synchronization signal, said third counter controlling a programmable read-only memory whose output is connected to the vertical D/A converter.

The integrated circuit 114 contains an electrically programmable and erasable fixed value memory, in which is stored a characteristic switch function for identifying the switch element condition.

For such a programmable read-only storage (PROM, EAROM, EEROM, etc.) numerous forms of implementation are known.

For example, such an association (apparent from the table) of the quadruples for values A of the pixel energy data and the values B of the phase counter with a value X output by an evaluator logic can be realized with a (programmable) read-only memory.

If desired the read only memory of the present invention may be programmed by implanting boron ions into the channel regions of the transistors which are to exhibit a high threshold voltage. Other known techniques such as by providing floating gates or variable threshold devices may also be employed to alter the threshold of selected cells in the read only memory of the present invention so as to form an erasble, programmable read only memory.

In either case, programmable read-only memories (PROM, EPROM, etc.) are preferably used as storages.

For the replacement circuit in the case of the known arrangement, on the memory chip changeover, devices and a programmable read-only memory are present for the storage of the information required therefore.

Furthermore, a programmable read-only memory PROM is present which is connected with the address bus AB and the read data bus RB.

To avoid this disadvantage, the programmable read-only-memory 19b must be replaced by a random access memory (RAM.)

It is even possible to make the repacketing patterns variable by corresponding switching over of the connections, for example by use of a programmable readonly memory (PROM) as illustrated in FIG. 4, which needs no further description in this regard.

The control outputs 141 to 145 are connected to the control inputs 161 to 165 of a read only memory ("ROM") 16, preferably a programmable ROM ("PROM"), in particular, an EPROM or an EEPROM.

The decision as to which programmable read-only memory is to be utilized for the conversion is made by a signal adjacent to the input 33, said signal proceeding into the code converter 9 parallel to the output c.

The programmable read-only memory 37 decodes the 6-bit code word into the number of the corresponding quantization stage which is then output into the following circuit at the output e.