Übersetzung für "Access cycle" in Deutsch

The lake and the direct access to the cycle path are 200 metres away.

In a disturbance-free access, the access cycle is completed with an acknowledge signal sent to the processing unit.

Then, the row address strobe RAS can be switched to High, to start a new access cycle.

Bikes are available to rent and the camp site has direct access to the cycle path to Torbole.

This revolving priority can be checked by writing the BBSy bit into the first shift register 11 in the case of a bus access by the data bus 4 at a first shift clock pulse T1 during the actual access cycle.

During an access cycle, one of the units, as a processing unit, accesses one of the other units in an address-controlled read or write mode.

This adaptation device generates the system ready control signal SR through a timer whose operating time must exceed that of the longest access cycle.

As a result, a situation in which different propagation times of input signals of the output driver circuit lead to multiple switching operations within an access cycle of a memory access is prevented.

In this example, the signal CAS is repeated at regular intervals; the access cycle thus has a uniform frequency.

In the case of higher or variable frequencies of the access cycle, however, there is the risk that the memory access time ta and the next transition of the signal CAS from the active state to the inactive state overlap temporally, with the result that the signal “output clock” is not activated and the output driver is not cleared.

In the case of higher and variable frequencies of the access cycle, however, there is the risk that the signal which disables the output driver after a data access and the memory access time overlap temporally, which thus leads to a defective functioning of the output driver.

The adaptation device generates control signal SR via a timer, whose operating time must exceed the longest duration of an access cycle.

Pupils successfullycompleting the technical stream have access to allintermediate cycle branches; those from the generalstream may enter the technician's training andvocational branches;and those in the vocationalstream may only enter the vocational branch.

BACKGROUND OF THE INVENTION The invention is directed to a method for accessing a common or shared memory of a multi-processor system composed of individual microprocessor systems, whereby the individual microprocessors access a common memory base region storing a common data base, with the use of appropriate matching devices, and with a multi-processor bus connected to all microprocessor systems, to allow a microprocessor system to access the common memory only for the duration of a system bus access cycle.

This is communicated to the main processor system HP by means of an allocation information signal Z1, whereupon the main processor system HP accesses the multi-processor bus MPB for the duration of an access cycle DZ.

The top-most row of FIG. 4B shows that the first address group R is applied first to be latched within the storage system for the entire access cycle (by the signals RAS 1, 2, 3, 4).

Subsequently, after a short time has elapsed (about 50 ns), the second group C of 8 address bits is applied, remaining on the address lines for the reset of the access cycle and determining the read process by means of the successively emitted signals CAS 1 to CAS 4.