Translation of "Semiconductor die" in German

In the long term, this leads to an unwanted temperature-related mechanical loading on the semiconductor die.

A semiconductor die 7 of a semiconductor component 8 is applied to the flange insert 4 .

The semiconductor component can be formed by an unhoused semiconductor chip (bare die).

This especially, relates to an adaptation with regard to the heat expansion coefficients of flange insert and semiconductor die.

In detail, the flange insert can be optimally adapted with regard to its material properties to the material properties of the semiconductor die.

The use of lead in solders to complete a viable electrical connection between semiconductor die and carrier within integrated circuit flip chip packages was, however, exempted from the restriction and is currently listed in entry 15 of Annex III to that Directive.

After optoelectronic testing, the common carriers 2 (submounts) on which laser chip 1, carrier parts 3 and 4, lens coupling optics 6, and monitor chip 7 are located, i.e. the micromodules, can be mounted on an overall carrier, for example the bottom plate of a TO housing, that has been provided. They are mounted like a standard semiconductor chip with die-bonding and wire-bonding techniques.

After optoelectronic testing, the common carriers 2 (submounts) on which laser chip 1, carrier parts 3 and 4, lens coupling optics 6, and monitor chip 7 are located, i.e., the micromodules, can be mounted on an overall carrier, for example the bottom plate of a TO housing, that has been provided. They are mounted like a standard semiconductor chip in die-bonding and wire-bonding technique.

The MEMS component is often designed with a mechanical diaphragm and mounting structure created on a semiconductor die.

In the housing, at least one semiconductor die is located which is electrically connected to the contact pins, for example bonded.

During the ever-increasing miniaturisation in the design of circuit boards, it has also become known to apply a semiconductor die without housing directly to the circuit board in one application step.

SUMMARY OF THE INVENTION The invention is based on the problem of developing the known method for assembling a circuit board in such a manner that optimum heat dissipation is possible with little temperature-related mechanical loading on the semiconductor die.

Due to the multi-part arrangement of the heat sink according to the proposal, especially due to the insertability of the flange insert, an optimum adaptation of the flange insert to the respective semiconductor die can be created as explained above.

In clarification, it may be pointed out that the term “semiconductor component” means the operational component which results from the applied and bonded semiconductor die 7 .

The semiconductor die 7 is applied to the flange insert 4 preferably by means of a bonding layer 9 for the implementation of which numerous possibilities are known from the prior art.

With respect to all the above variants, it may be pointed out, to clarify, that a flange insert 4 does not necessarily accommodate precisely one semiconductor die 7 .

In this direct assembly, the application step is mostly followed by a bonding step in which the semiconductor die is electrically contact-connected to the circuit board.

In the known method (U.S. Pat. No. 6,809,935 B1, FIG. 1), a semiconductor die is attached directly to the metallic baseplate which provides a flat heat sink for the circuit board.

One factor is the fundamental consideration to equip the circuit board or a semifinished circuit board part initially with at least one flange insert and only then to apply at least one semiconductor die to the flange insert used.

In detail, it is proposed that in one assembly step, at least one rigid flange insert is inserted into an associated recess in the circuit board or in a semifinished circuit board part and that in a subsequent application step, at least one semiconductor die of a semiconductor component is applied to the flange insert already inserted.