Translation of "Read bus" in German

I have heaps of insults Have to read about their bus friends.

The output is connected to the first line of the memory array read address bus MAADRD.

Where does the London to Read bus arrive?

The name on the receipt might be read as "Wanen Bus".

Furthermore, a programmable read-only memory PROM is present which is connected with the address bus AB and the read data bus RB.

Therefore, a difficulty results since the information from the read-only memory is made available only in 4 bit words on the read data bus RB.

The bits which after the renewed check bit generation, i.e. after the comparison, remain in the flipflops and which as specified above are called "syndrome bits" (S1-S8) are read via a bus 64 into an error detecting and localizing logic 18.

The data bus read instruction at the beginning of the wait routine is particularly advantageous if during the wait routine the data bus is in an undefined state with variable contents.

Subsequently, the memory 12 or 14 reads the addressed memory location and transfers the data read, via the bus 16, to the microprocessor which accepts this data a predetermined period of time after the control signals on the connection 11.

The data bus read instruction addresses the bus control units BCU and the ALU or the multiplier, and the multiply and add instruction addresses the multiplier and the ALU, which have a relatively high power consumption.

The remaining lines of the memory array read address bus MAADRD are at a logic level which is complementary to the logic level of the first line and which is also constant.

In both multiplexers MUXRD, the respective data input line MARDp,r or WDp,r, having an associated line of the memory array read address bus MAADRD which is in the active state, is switched through to the respective output in the normal operating mode.

An advantageous wait routine, comprising a data bus read instruction, a multiply-add instruction, and a return jump to the data bus read instruction, allows for the fact that in program routines for filter computation, about 60% of the instruction codes used are data-bus accesses and multiply-add operations with relatively high power consumption of the processor, while the remaining instructions, such as program branch instructions, are instructions with low power consumption.

Interface 3 is also assigned to the address register of the release impulse ALE (ALE-STROBE), the read-input impulse (Read Strobe) for bus read, and the write input impulse WR (Write Strobe) for bus write.

This unsatisfactory situation is resolved by an allocation scheme in which the requesting processor, after the first unsuccessful test and set instruction, gains storage access by a bus command which differs from the usual (read storage) bus command.

For that purpose, the read-out check byte is read, via bus 22, gating circuit 28, and bus 29 into flipflops LT1-LT8 prior to the generation of the check bits.

Torch LED, which glows longer and consumes less energy than a regular bulb, helps you read bus schedules or find a lost object at night.

In the lower-level bus system 420, input data is read into the bus nodes 610, 620, and 630 at a certain time before the start of the next internal cycle.