Translation of "Binary pattern" in German

The binary pattern of the digitized signal is represented by the vibrational states of the individual resonator means.

Fingerprints consist of a name pat-tern and/or a binary pattern.

The binary bit pattern defines the intervals in which a pumping pulse is sent out.

This binary value pattern can be converted into a dual code, for example, using a priority decoder known per se.

To this end, the delay time is subdivided into fixed intervals, and these intervals are assigned to a binary bit pattern.

For this, a digital pulse is issued for each path or a binary bit pattern for each path segment.

In addition, the stages belonging to the erroneous column have to be set to zero in the OR array, and the binary pattern provided for these stages has to be loaded into stages LO 00 to LO 30 belonging to dummy line UEL.

If an output line AL of the OR array 7 is defective, the binary pattern provided for the shift register of the erroneous line has to be loaded into the shift register belonging to dummy line OEL, i.e., into stages LO 00 to LO 04.

In these output lines, a random binary pattern may be stored, as the cross point between the dummy line and the PLA line connected thereto is controlled by one storage element.

If the dummy line UEL is activated, the binary pattern, which was previously loaded in the shift registers belonging to the erroneous column, has to be loaded into shift register 0, i.e., into stages LU 00 to LU 30.

The major problem was that there quired distance between the individual lines of the binary pattern (distance between two binary lines = line width) was so small.

Depending on the disposition of one or more bridges 87, many codes, in a binary pattern, can be produced in the various code carriers 80.

This binary value pattern, i.e. the position of the binary value "0" within the other binary values "1", results in the digital code of the digitized analog signal.

The priority decoder P then provides at its outputs a dual-coded binary value pattern which depends on the place where the voltage cancellation occurs on the chain of resistors and thus on the converted analog signal value.

At the output of this fine priority decoder PF a binary value pattern is then available in a dual-coded fashion, characterizing the place of the voltage zero point on the fine divider chain.

In a preferred embodiment of the invention, the decoder comprises b decoder input terminals adapted to be fed during each address word segment with one of the b segment bits thereof each, as well as 2b decoder output terminals at which a binary value pattern occurs upon each decoding operation, such that a first binary value, for example "1", occurs at one of the decoder output terminals and the opposite binary value, for example "0", occurs at all remaining decoder output terminals.

In order to address electronic modules in computers, a series of bus line pairs between successive slots are interchanged in accordance with a binary pattern such that each slot has an unmistakable coding.

In diagram 64, a voltage signal 67 is plotted across the same scaled time axis 65 and a voltage axis 66, which exhibits a constant frequency, however in which the binary pattern is cast as phase shift by means of the afore-described DPSK modulation.

This logical interlocking ensures that no incorrect binary values can occur in the binary pattern at the inputs E1 to En of the encoder element 60, and thus also that the code conversion always leads to the correct digital value which corresponds to the peak value of the voltage Us.

The carrier 12 has a coil 13 in which a voltage is induced by means of an inductive high-frequency field 14 for operation of a circuit 15 for reading out a stored binary pattern.

A received cell 30 is fed by a receiver 31 to a correlator 32. The correlator 32 correlates the available useful field 33, in which the test pattern is found, with a cell- and bit-synchronous reference pattern 34 (or with the binary-inverted reference pattern).