Translation of "Wafer pattern" in German

The invention will be explained below, by way of example, with reference to an optical layer thickness measurement system which is part of a wafer production line and with which the intended wafer pattern can be monitored directly.

Up to now attempts have been made to protect the back by applying a positive resist all over the back of the wafer and to pattern it through photolithography so that it remains only in the caverns and not on the remaining back of the wafer.

When the wafers being produced are switched over to a new pattern, this device can thus easily be adapted to a new wafer pattern in a learning procedure.

For this purpose, a photoresist is applied to the wafer underside and patterned.

For this purpose, a photoresist is applied to the pre-patterned wafer underside and is patterned.

The wafers were then patterned by exposure with a proximity contact printer of Canon Inc.

In both cases, the mask covers the entire wafer, and simultaneously patterns every die.

Patterned wafers provided for chip production cannot, in practice, be produced without deviations from the ideal pattern.

The structures of a patterned wafer 21 are molded or transferred onto the top cap wafer 2 .

In this manner, the structures of the patterned wafer 21 are completely molded onto the top cap wafer 2 .

On a patterned wafer, a microscopically readily recognizable light reflection was observed in the area of a bond pad.

Next, the mask for production of the cantilever is fabricated as a result of a photoresist once again being applied to the pre-patterned wafer underside and being patterned in accordance with the desired shape.

SUMMARY OF THE INVENTION Proceeding therefrom, it is the object of the invention to create a method for defect evaluation on patterned wafers that allows, with high reliability, a distinction between defects impairing the functionality of a chip (critical defects) and defects that do not impair functionality (noncritical defects).

New functions for the two-dimensional acquisition and storage of backscattered electron images, and an algorithm for finding a respective salient structure (of the reference image) within a search image that is larger compared to that reference structure, were incorporated as part of an expansion of capabilities for global alignment on previously patterned wafers or masks within the CAL software of the ZBA 31 (k) electron beam exposure system.

According to the present invention, the semiconductor layer of the basic wafer, i.e. the silicon layer in the case of an SOI wafer, is patterned so as to produce a fluid structure of the fluid device, the fluid structure extending through the semiconductor layer.

The photoresist layer on three of the patterned wafers was treated with the processing solutions made in Preparations 1, 3 and 4.

This patterned wafer 21 remains unchanged in the areas by which the optical windows 13 are molded so that the original surface quality of the polished silicon wafer 21 is retained.

In the areas in which the contact areas 7 of the top cap wafer 2 are produced, deep grooves 23 are uniformly etched into the patterned wafer 21 .

This can be achieved for example very homogenously over the entire patterned wafer 21 in a time-controlled manner by wet etching methods using potassium hydroxide (KOH) or TMAH (tetramethylammonium hydroxide).

To maximize homogeneity of groove depth and at the same time to minimize roughness on the groove bottoms (27), an SOI wafer (silicon on insulator wafer) of equivalent thickness can be used for the patterned wafer 21 instead of the standard silicon wafer, the grooves 23 being etched up to the concealed oxide layer.

To completely mold the structures of the patterned wafer 21, it is generally necessary to carry out this bonding process in a vacuum.

Because of the glass flow, the side of the top cap wafer 2 facing away from the patterned wafer 21 is no longer planar after cooling (FIG. 4 c) and must therefore be planarized and smoothed in a precise grinding and polishing process until optical quality is ultimately restored.

In the next step, the polished top cap wafer 2 is released from the patterned wafer 21 in that the patterned wafer 21 is etched away by wet etching.

An oxide layer 16 is initially created on the SOI wafer 10 and patterned (step 1 - 1).

It is of course also possible, however, to use patterned cap wafers or even cap wafers patterned only in subregions, the patterning of the cap wafer enabling, for example, electrical contacting of the micromechanical component.