Translation of "Instruction processor" in German

The incrementation ensues with a processor instruction.

The incrementing of the counter reading is likewise implemented within a single clock cycle by a processor instruction.

The acknowledgment pulse which is output by the control unit ST of the processor B and which indicates the end of the working off of an instruction in the processor, effects that the instruction address residing in the address buffer register AZR is written into the address register AR.

Following, for example, a manually or automatically put in start instruction to processor 9, the latter monitors the entire processing sequence, i.e. in addition to the predetermined electronic processing of the video signals possibly also the periodically repeated start/stop mode of the video recorder.

The instructions read into the processor P are begun to be worked off with the beginning of the clock cycle and, at the same time, the read-in of the next instruction into the processor P from the external program memory EPS begins.

The set of instructions of the design used represents a processor instruction set which includes 16 ALU instructions and utilizes only two working registers.

For example, GCC (since version 3.4 in April 2004) includes a builtin function __builtin_popcount that will use a processor instruction if available or an efficient library implementation otherwise.

An expression is an instruction for the processor to perform an operation and to return the value in a new or existing column of the dataset.

With such an instruction, the host processor 1 should individually determine for which plurality of bytes the most recently written data this check should occur.

According to another aspect, means for analyzing the CAM program and means for inserting the at least one monitoring instruction comprise a processor.

This, in turn, allows the implementation of particularly fast and efficient instruction pipelines and instruction execution units, so that it is possible to execute an average of up to one instruction per processor cycle.

However, even with RISC processors, it is not possible to execute more than one instruction per processor cycle due to the sequential nature of both processing and results that continues to apply.

Nevertheless, the use of configurable hardware blocks such as the functional unit (42) generally allows the execution of a greater number of actions that have to be effected by executing instructions, per time unit, than is possible with conventional program-controlled units. It is therefore possible to process more than one instruction per processor cycle.

In the scope of the present patent application, the term word is understood as a data unit which may be loaded from the memory or stored in the memory using a single processor instruction.

A passive optical network communications apparatus, wherein the communications apparatus comprises a memory and a processor, wherein the memory is configured to store an instruction, and the processor is configured to execute the instruction stored by the memory:

According to a further aspect, the means for analyzing the CAM program and means for inserting at least one monitoring instruction comprise a processor.

An example of a processor is a general purpose processor, a microprocessor, a micro-control unit such as a microcontroller, a digital signal processor (DSP), an application specific integrated circuit (ASIC: Application-Specific Integrated Circuit], a field-programmable gate array (FPGA] and a processor with an application-specific instruction set (ASIP: Application-Specific Instruction-Set Processor].

A terminal, wherein a client application CA is run on the terminal, wherein a rich execution environment and a trusted execution environment are deployed on the terminal, and the terminal comprises: a processor, a memory, and a hardware device used to display an interface of the terminal, wherein the memory stores a program or an instruction, and the processor invokes the program or the instruction stored in the memory, to:

A terminal, wherein a client application CA runs on the terminal, a rich execution environment and a trusted execution environment are deployed on the terminal, and the terminal comprises: a processor (210), a memory (220), and a hardware device (260) configured to display an interface of the terminal, wherein the memory stores a program or an instruction, and the processor invokes the program or the instruction that is stored in the memory, to perform the method of claims 1 to 6.