Übersetzung für "Taktgesteuert" in Englisch

These processes are clock-controlled in a manner known per se.

In a preferred form of embodiment of the invention, the acquisition of data is clock-controlled.

For example of the respective feedback of the ring oscillator circuit can be changed under clock control or periodically.

Since the scanner SC operates in a well known manner in a clock-pulse-controlled fashion, after the stop signal SCS has been switched off, the scan operation is continued with the next clock pulse at the location previously reached, i.e. by way of the cyclically following address line the line terminator or multi-address terminator connected with the address line is selected.

The object scanned by the optical system 6 produces charges in the individual cells of the photodiode array according to the intensity of the radiation reflected off the object. These charges are fed under clock control to a correction or compensation circuit 10.

They are clock-controlled and function to receive and transfer with time delay the messages transmitted via the individually established connections.

This must occur clock-controlled and phase-synchronized, as disclosed in greater detail in European Patent Application EP-A1 0 360 924 (corresponding to U.S. Pat. No. 5,146,953, as well as, European Patent Application EP-A1 0 360 065 regarding the control of the signaling or status message channel.

The data register DDR is loaded from a shadow register SRR, which in turn can be loaded in clock-controlled fashion from a shift register SIRR.

In order to be able to easily update identification data of individual system assemblies and have them polled by a signal collector, the identification data is input into EEPROMs with a setup computer and is interrogated address-selective and clock-controlled with the signal collector.

It will be understood that the stepwise rotation of the turntable 41 on the shaft 42 can be cyclically controlled automatically (not shown).

The arrangement is preferably such that for the continual monitoring of the logic portion, the outputs of the logic portion supplying the control voltages for the driver stages are connected to one stage each of the compare circuit. In addition, the outputs of the corresponding stages of the ring counter are in each case connected to the same stages of the compare circuits with said ring counter directly incrementable by stepping control pulses, and with the compare circuit clock-controlled by the same stepping control pulses via a delay element.

It is particularly favorable that for continually monitoring the driver stages of the driver portion, signals indicating the switching state of the driver stages are derived from the collectors of the latter after level conversion into corresponding logical values, said signals being applied to the corresponding stages of the compare circuit. In accordance with such an arrangement, the individual stages of the ring counter are incrementable by stepping control pulses, and the compare circuit is clock-controlled by the same stepping control pulses via a delay element.

The circuit structure considered above and shown on the drawing assures that the binary signals appearing on the signal receiving lines e1, e2, e3 with different phase positions, these binary signals all appearing with the same frequency in accordance with the assumption, are accepted clock-controlled into the appertaining signal receiving devices Ae1-Ae3 without signal loss occurring.

The further flip-flop 9 is not clock-controlled, and when there is a pulse at the input of the flip-flop 9, it inverts the logical state of an output thereof.

The production line, as shown schematically in FIGS. 5 and 6, for the manufacture of the dispenser takes place by means of a fixed-cycle control, i.e., the movement of the material takes place step-by-step.

For the control signal at connection 8 of the control device 5 this means that the transistor 4 is clock-pulse controlled in such a way that the voltage U 1 decreases again until the voltage U 1 falls below the switching threshold formed through the transistor 12 and the Zener diode 13 .

This is achieved by dividing the data path into a plurality of sections that are operated in parallel clock-controlled chronologically for a plurality of data sets.

This must be performed in a clock-controlled and phase-synchronous manner, as described in more detail in European Patent Application EP-A1 0 360 924 corresponding to U.S. Pat. No. 5,146,453 hereby incorporated by reference, and European Patent Application EP-A1 0 360 065 corresponding to U.S. Ser. No. 803,615 filed Dec. 9, 1991 hereby incorporated by reference, by the controlling of the signalling channel.

Due to the method according to the invention, the self-calibration is relatively invulnerable to interference that occurs during the calibration operation and that can, for instance, be produced by clock-controlled circuit units.

If the memory access control is clocked, for example, the successive memory access process steps described are independent of the clock frequency.

The associated method according to the invention, according to an aspect of the invention is characterised in that individual transport units are released in a cyclically controlled manner by way of the release device and are moved cyclically synchronously with the individual products from the provision conveyor into the takeover section.